Field effect transistors (FETs) are widely used in integrated chips. FETs comprise a source, a drain, and a gate. By applying a bias voltage to the gate, current flow between the source and the drain can be controlled. The subthreshold drain current of a FET is the current that flows between the source and drain of a FET when the transistor is in subthreshold region (i.e., for gate-to-source voltages below the threshold voltage). A large subthreshold slope (i.e., a small subthreshold swing) is typically desired since it improves the ratio between on and off currents, and therefore reduces leakage currents.
As the semiconductor industry is reducing the size of transistors, it is also reducing supply voltages to reduce the power dissipation and to maintain reliability of devices. Reducing the supply voltage reduces a gate voltage swing between on and off states of a device. To prevent a reduction in performance the threshold voltage may be decreased. However, the threshold voltage reduction is a function of the subthreshold drain current, and therefore is limited according to the finite nature of the subthreshold swing.